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KUPEGA Hearing Aid SoC

Initial Tape-out
2024
Category
accelerator
Signal Type
digital
Functional Role
ai-ml compute
Project Context
research
Application Domain
medical research
Technology Type
FD-SOI
Development State
Silicon Verified
Process Node
22nm
PDK
GF22FDX

Description

The Lightweight Interleaver Network Accelerator (LINA) is an ultra-low-power neural network accelerator designed for real-time audio processing on the KUPEGA Hearing Aid SoC. It efficiently executes 2D convolution, the fundamental operation of convolutional, fully connected, and recurrent neural networks. A flexible interleaver network dynamically partitions workloads between memory and up to 128 processing elements to maximize utilization while minimizing data movement. Fabricated in 22 nm FD-SOI, the ASIC achieves up to 7339 GMACs/s/mW. Measurements demonstrate 6.1 million MACs in 1.6 ms at 54 MHz and 4.97 mW at extended processing time.

Technical Specifications

Die Area
6 mm²
Transistors
2200000
Memory Blocks
SRAM (1.3 MiB)
Power Consumption
typ. 5 mW
Supply Voltages
0.5V, 0.65V, 0.8V, 1.8V
Packaging
QFN48
Temperature Range
-40 °C bis +125 °C

Architecture Details

Clock Frequency
50 MHz

Funding & Project Context

Project
Hearing4all 2.0
Funder
DFG
Grant ID
390895286
Runtime
2023-2025

EDA Tools Used

  • Cadence Virtuoso (Analog Schematic & Layout)
  • Cadence Genus (Digital Synthese)
  • Cadence Innovus (Digital Place & Route)
  • ModelSim (Simulation)
  • Vivado (Emulation)

Verification Methods

  • Simulation
  • FPGA-Prototyping
  • Post-Silicon-Bring-up

The information displayed on this page has been provided by the listed Chipdesign Germany members and has not been verified by Chipdesign Germany.

Events

© IEEE PRIME Conference
Sep 20, 2026 - Sep 23, 2026
Berlin

PRIME 2026

21st International Conference on PhD Research in Microelectronics and Electronics

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© Fraunhofer IIS
Jun 29, 2026 - Jul 2, 2026
Dresden

SMACD 2026

International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design

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© IdeenExpo
Jun 20, 2026 - Jun 28, 2026
Hannover

IdeenExpo 2026

Europas größtes Jugendevent für Technik und Naturwissenschaften

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© Informationstechnische Gesellschaft ITG VDE e.V.
Jun 19, 2026
Dresden

bits, bonding, bassline

Festival der Elektronik

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May 6, 2026 - May 7, 2026
Dresden

Chipdesign Germany Forum 2026

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© DATE Conference
Apr 20, 2026 - Apr 22, 2026
Verona

DATE 26 conference

Design, Automation and Test in Europe Conference

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© Fraunhofer IIS / Paul Pulkert
Mar 25, 2026
Erlangen

4. Fachtagung Chip-Entwicklung

Innovationen und Trends in der Halbleiter-Branche - Netzwerkveranstaltung des Bayerischen Chip-Design-Centers

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© AACD
Mar 18, 2026 - Mar 20, 2026
Ulm

AACD Workshops

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© ISPD
Mar 15, 2026 - Mar 18, 2026
Bonn

International Symposium on Physical Design (ISPD)

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© Clemens Born
Mar 12, 2026 - Mar 13, 2026
Hannover

26. Workshop Analoge Schaltungen & DE:Sign Kooperationsworkshop

Austausch zu integrierten Analog- und Mixed-Schaltungen & Entwurfs-Werkzeugen

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© NürnbergMesse GmbH
Mar 10, 2026 - Mar 12, 2026
Nürnberg

embedded world 2026

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