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DI-FITS

Open Design Methodology for Standardizing and Automating IP Integration in Chip Architectures

DI-FITS develops an open design methodology for the standardization and automation of IP integration in chip architectures, reducing development time and error sources in complex System-on-Chip designs.

Objectives and Approach

The project makes the development process more efficient and promotes the development of new, innovative chips through a standardized description language (FITS-IR) for reusable IP components. Formal verification and automatic code generation simplify chip integration.

Innovations and Perspectives

An open-source tool environment enables further development by the open-source community and creates free access with high dissemination potential. This contributes to strengthening chip design in Europe and to the spread of open-source hardware.

Project Coordinator

Project Partners

This project is funded by the German Federal Ministry for Research, Technology and Space (BMFTR) as part of the Design Initiative Microelectronics.

Events

© IEEE PRIME Conference
Sep 20, 2026 - Sep 23, 2026
Berlin

PRIME 2026

21st International Conference on PhD Research in Microelectronics and Electronics

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© Fraunhofer IIS
Jun 29, 2026 - Jul 2, 2026
Dresden

SMACD 2026

International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design

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© IdeenExpo
Jun 20, 2026 - Jun 28, 2026
Hannover

IdeenExpo 2026

Europas größtes Jugendevent für Technik und Naturwissenschaften

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© Informationstechnische Gesellschaft ITG VDE e.V.
Jun 19, 2026
Dresden

bits, bonding, bassline

Festival der Elektronik

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May 19, 2026 - May 20, 2026
Baden-Baden

microTEC Clusterkonferenz 2026

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May 6, 2026 - May 7, 2026
Dresden

Chipdesign Germany Forum 2026

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© DATE Conference
Apr 20, 2026 - Apr 22, 2026
Verona

DATE 26 conference

Design, Automation and Test in Europe Conference

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