DE:Sign & DE:Sign Challenge Projects
The DE:Sign & DE:Sign Challenge projects develop open-source design tools, methods, and infrastructures for the entire chip design flow – from transistor modelling through verification and simulation to manufacturing and education. Chipdesign Germany coordinates and connects the participants from academia and industry.
DE:Sign Funding Guideline
Fifteen pre-competitive research projects on open-source chip design tools, funded by the BMFTR from May 2024 to April 2027.
DI-DEMICO
Open-Source Design Tools for High-Performance and Energy-Efficient Microchips in the Millimeter-Wave Range
DI-DEMICO develops open-source tools for the design of high-performance and energy-efficient microchips in the millimeter-wave range. These chips are essential for modern 5G/6G communication systems and high-frequency radar sensors.
DI-DERAMSys
Open-Source Simulation Tools for Highly Integrated Semiconductor Memories
DI-DERAMSys provides open-source simulation tools for highly integrated semiconductor memories. The project enables free, reproducible research and optimization of modern DRAM architectures.
DI-EDAI
Open-Source Design Tools for the Co-Design of AI Algorithms and AI Chips
DI-EDAI develops open-source design tools for the co-optimized design of AI algorithms and AI chips, directly addressing the tight coupling between software and hardware design in AI applications.
DI-ExViPaS
Open-Source Test and Analysis Tools for Improving the Security of Chip Architectures
DI-ExViPaS creates open-source test and analysis tools that identify and remediate security vulnerabilities in chip architectures, strengthening the trustworthiness of digital systems against hardware attacks.
DI-FEntwumS
Open-Source Design and Visualization Environment for Dynamically Reconfigurable Microchips
DI-FEntwumS develops an open-source design and visualization environment for dynamically reconfigurable microchips, enabling flexible adaptation of hardware to changing application requirements.
DI-Flowspace
Open-Source Design Kit for Radiation-Hardened Microelectronics in Space and Medical Technology
DI-Flowspace creates an open-source design kit for radiation-hardened microelectronics in space and medical technology applications, addressing the specific safety and reliability requirements of these critical domains.
DI-GATE-V
Highly Optimized Open-Source RISC-V Processors for Universal Applications
DI-GATE-V develops highly optimized open-source RISC-V processor cores for general-purpose applications. The open RISC-V architecture forms the basis for sovereign and transparent processor development.
DI-Meta-X
Open-Source Data Format for Free Access to Industrial Semiconductor Manufacturing
DI-Meta-X defines an open-source data format for free access to industrial semiconductor manufacturing. Standardized interfaces to foundries are a key element of an open chip design ecosystem.
DI-OCDCpro
Open-Source Chip Design Infrastructure as a Learning and Competition Platform for Students and Young Talents
DI-OCDCpro builds an open-source chip design infrastructure serving as a learning and competition platform for students and young talents, combining hands-on chip design experience with competitive educational formats.
DI-ORDeC
Text-Based Open-Source Design Methodology for Sustainable Design of Analog Microchips
DI-ORDeC introduces a text-based, open-source design methodology for the sustainable and reproducible design of analog microchips, facilitating version control and collaboration in analog circuit design.
DI-OSVISE
Open-Source Design Tools for the Verification of Processors and Digital Circuits
DI-OSVISE develops open-source design tools for the verification of processors and digital circuits. Rigorous verification is indispensable for reliably ensuring the functional correctness of hardware.
DI-OWAS
Open-Source Design Tools for Flexible Chip Systems in AI and Cryptography
DI-OWAS provides open-source design tools for flexible chip systems optimized for AI inference and cryptography. Application flexibility and security are central requirements of modern digital infrastructure.
DI-PASSIONATE
Open-Source Design and Simulation Environment for Highly Integrated 2.5D/3D Chip Systems
DI-PASSIONATE creates an open-source design and simulation environment for highly integrated 2.5D/3D chip systems. These advanced integration technologies enable the combination of heterogeneous chiplets into high-performance systems.
DI-ReDesign
Open-Source Design Tools and Libraries for Novel Transistor Technologies
DI-ReDesign develops open-source design tools and standard cell libraries for novel transistor technologies beyond classical FinFET architectures, providing the adapted design methods required by emerging processes.
DI-SIGN-HEP
Trusted Hardware for Industrial Data Processing
DI-SIGN-HEP develops trusted hardware solutions for secure and reliable industrial data processing. Tamper-resistant hardware is a cornerstone of digital sovereignty in industrial applications.
DE:Sign Challenge
Eight projects addressing gaps in open-source chip design flows and workforce development, funded from January 2026.
DI-ChipsEDU
Open Educational Platform to Strengthen the Skilled Workforce in Chip Design
DI-ChipsEDU builds an open educational platform to strengthen the skilled workforce in chip design. Practice-oriented, freely accessible learning materials and environments specifically support students and career starters.
DI-CHOPS
Open-Source Design Flow for the Heterointegration of Electronic-Photonic Systems
DI-CHOPS develops an open-source design flow for the heterointegration of electronic-photonic systems, unlocking new classes of ultra-fast and energy-efficient systems by combining electronics and photonics on a common substrate.
DI-FITS
Open Design Methodology for Standardizing and Automating IP Integration in Chip Architectures
DI-FITS develops an open design methodology for the standardization and automation of IP integration in chip architectures, reducing development time and error sources in complex System-on-Chip designs.
DI-FlexPDK
Automated Development of Open-Source Libraries for Process Design Kits for Chip Manufacturing
DI-FlexPDK automates the development of open-source libraries for Process Design Kits (PDKs) required for chip manufacturing. Open PDKs are a central foundation for an accessible and transparent chip design ecosystem.
DI-GoodTimes
Open-Source Timing for Modern Microelectronics
DI-GoodTimes develops open-source timing tools for modern microelectronics. Precise timing analysis is indispensable for the reliability and performance of digital chips.
DI-HYPRSENSE
Virtual Prototypes for the Design of Modern Sensor Systems
DI-HYPRSENSE creates virtual prototypes for the design of modern sensor systems, enabling early validation and optimization before chip tape-out. Virtual prototyping saves costs and significantly accelerates the development process.
DI-ININV
Interactive Open-Source Interface for Formal Verification of Chip Designs
DI-ININV develops an interactive open-source interface for the formal verification of chip designs. Formal verification provides mathematical guarantees for the correctness of digital systems, complementing simulation-based testing methods.
DI-ORBIT
Open-Source Design Chain for RRAM-Based Computing
DI-ORBIT develops an open-source design chain for RRAM-based computing, which uses resistive memories as active computing elements. RRAM technologies offer promising possibilities for extremely low-power and non-volatile computing operations.
Taiwan Cooperation
Six joint German-Taiwanese research projects on advanced chip design, co-funded by the BMFTR and Taiwan's MOST from May 2024 to April 2027.
DE-TW-ATTRACTS
Flexible Communication Chips for Extreme High-Frequency Applications
DE-TW-ATTRACTS is a German-Taiwanese cooperation project developing flexible communication chips for extreme high-frequency applications, combining complementary expertise from both countries in high-frequency technology.
DE-TW-FeEdge
Novel Compute-in-Memory Modules for Energy-Efficient Edge AI
DE-TW-FeEdge develops novel Compute-in-Memory modules for energy-efficient edge AI applications in a German-Taiwanese partnership. Compute-in-Memory concepts reduce data transport and thereby significantly lower the energy consumption of AI inference.
DE-TW-NeuroMemSense
Memristive Edge AI Chips for Trustworthy and Secure Biosensing
DE-TW-NeuroMemSense develops memristive edge AI chips for trustworthy and secure biosensing. The combination of neuromorphic architectures with resistive memory technologies opens new possibilities for intelligent, low-power sensor systems.
DE-TW-PI3D
Simulation and Design Tools for Photonically Interconnected 2.5D/3D Chip Systems
DE-TW-PI3D develops simulation and design tools for photonically interconnected 2.5D/3D chip systems. Photonic interconnects promise significantly higher bandwidths at considerably reduced energy consumption compared to electrical interconnects.
DE-TW-PNN
Photonic Edge AI Chips for Energy-Efficient High-Speed Applications
DE-TW-PNN develops photonic edge AI chips for energy-efficient high-speed applications. Photonic neural networks combine the processing speed of optical systems with the strengths of neural network architectures.
DE-TW-TEdgeAI
Design Concepts and Methods for Trustworthy and Attack-Resistant AI Chips in Edge Computing
DE-TW-TEdgeAI develops design concepts and methods for trustworthy and attack-resistant AI chips in edge computing environments. As edge AI becomes more prevalent, the demand for hardware resistant to adversarial attacks increases.
The listed projects are funded by the German Federal Ministry for Research, Technology and Space (BMFTR) as part of the Design Initiative Microelectronics.
