DI-ININV
Interactive Open-Source Interface for Formal Verification of Chip Designs
DI-ININV develops an interactive open-source interface for the formal verification of chip designs. Formal verification provides mathematical guarantees for the correctness of digital systems, complementing simulation-based testing methods.
Objectives and Approach
The project develops a modern open-source environment for formal chip verification. The approach creates an incremental model-checking API integrated into a waveform viewer, enabling analysis of signal traces in circuit simulations and interactive verification through new algorithms and user-friendly interfaces.
Innovations and Perspectives
Combining an incremental model-checking API with a waveform viewer enables interactive verification during circuit design, improves tooling, and increases acceptance in open-source chip development. The tool reduces costs, supports SMEs, and promotes skilled workforce development for sovereign German chip design.
Project Coordinator
- Hochschule für angewandte Wissenschaften München
This project is funded by the German Federal Ministry for Research, Technology and Space (BMFTR) as part of the Design Initiative Microelectronics.
